SATA Host/Device Phy IP Core

Sata Devices

Jitter Performance TaraCom provides unique SATA Host and Device Phy IP cores supporting Gen 1 SATA (1.5 Gbps) and Gen 2 SATA-IO (3 Gbps) standards. TaraCom’s SATA IP cores are SAPIS compliant and available in single and multi-lane for integration within ASICs, SoCs, and customized designs.

The SATA IP product family incorporates unique high performance Phase-Lock Loop (PLL), excellent jitter performance and advance built-In Testing (BIST) features for easy and low cost production testing. The unique optimized design provides the lowest power per channel using TSMC’s 130, 90, and 65 nm CMOS technology.

  • 1 V supply
  • Jitter Tolerance and generation exceed SATA Spec.
  • Spread Spectrum Clocking (SSC)
  • 70/100 mW /channel
  • AC and DC coupling support
  • SATA Gen 1&II and SAPIS Compliant
  • Rate Negotiation Processor
  • Advance at Speed BIST and Diagnostics

SATA Phy Product Brief - TRC3002 TaraCom Solutions of SerDes IP Technology


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